But the answer is not what was asked

I'm not talking after generation of data corruption (some of which I know a little) <> I'm specificaly asking during the transport phase, as if this is the 100% 'as is ' so to speak, then every transport section ever made should be unequivicably equal, absolutely no errors regardless of construction (S/R code permitting), then it's just down to the transmission/psu/dac etc errors. thoughts please