It's hypothetical really.

Which would be the best option performance wise if both were same speed? like 2x128 @"x" speed, or 1x256 @ "x" speed.

Want to know if havig it spread across two seperate chips will make it faster or slower? I assume it would be faster as would allow both to be accessed simultaneously.

Cost, upgradability, etc don't come into it, just performance.

Cheers.